Ultra-High-Speed Reed-Solomon turbo decoder
نویسندگان
چکیده
This article presents an FPGA implementation of an ultra-high-speed Reed-Solomon (RS) turbo decoder. A performance analysis is performed showing that RS Block Turbo Codes (RS-BTC) have decoding performance equivalent to Bose Ray-Chaudhuri Hocquenghem-Block Turbo Codes (BCH-BTC). A ratio between the decoder throughput and the decoder area is used to show the higher ef ciency of the RS full parallel turbo decoder. Finally an implementation of a RS(31,29) block turbo decoder on a high performance board including 6 Xilinx Virtex5 FPGAs is detailed. The resulting turbo decoder has an information throughput above 6Gb/s while the working frequency is only 45MHz.
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